1. Field of the Invention
The invention relates to a contact structure and semiconductor memory device using the same. More particularly, the invention relates to a contact structure that can be disposed in a densely packed memory array for picking up address lines within the memory array region.
2. Description of the Prior Art
A continuous challenge in the semiconductor industry is to decrease the size of memory cell components in order to increase the packing density of the DRAM chip. Over the last few device generations, DRAM manufacturers have developed alternative cell layouts that reduce the area they occupy on the chip. The latest designs allow a significant increase in density by burying the address lines in the silicon substrate, then fabricating the transistor and capacitor on top to form a vertical stack.
In current DRAM process, additional process steps are required to connect Ml contacts to extended address lines such as bit lines at the periphery area adjacent to the array edge. For a memory array having densely packed memory cells and each cell having four square feature area (4F2), there is typically no option to pick up the bit lines within the array, particularly at the array center. Therefore, the circuit layout application is limited and the die size is increased. It is desirable to provide an improved contact structure that can be disposed within a memory array having densely packed memory cells for picking up address lines.